Area of expertise
We are focused on system level SoC design and embedded software development.
And it’s predominantly represented by Toolchains, EDA and System software.
Universal Translation Library — implementation of analysis and optimization algorithms abstracted from a particular compiler IR which could be ported to any toolchain.
SMCC compiler based on LLVM and UTL provide 50% more performance than the best existing solution Linaro*
*compared on 8-core ARM CPU
It's a compiler intended to provide the fastest way to map complex algorithms into FPGA/ASIC and reduce processing time and cost of IP-blocks development.
Developers-friendly environment with no general restriction on source code makes porting of big apps easier and is suitable for HPC, embedded and ASIC design.
Uses virtual system on chip (VSoC) with many cores and peripheral devices for operations w/ files, IO, network, etc.
Translates applications for VSoC and merges binaries with VSoC description to get the minimal area with maximal frequency.
Provides user possibility to debug applications for VSoC on FPGA as on usual embedded processors with standard tools (GDB, Eclipse).
Hypercore customization language based on a principle «single description — multiple implementations».
Key tool for RISC-V ISA customization. In case of any specific applications of the future core, PPDL allows you to find the best set of ISA for optimization and achieve best performance per Watt or best performance per cost.
Up to 7 times cost reduction of core developing
Significant cost reduction of core customization
Extremely low cost of ISA modifications