Programing hardware to operate more efficiently

Area of expertise

We are focused on system level SoC design and embedded software development.

And it’s predominantly represented by Toolchains, EDA and System software.


Universal Translation Library — implementation of analysis and optimization algorithms abstracted from a particular compiler IR which could be ported to any toolchain.


• on GNU
• LLVM with different arches: x86, MIPS, ARM, Italium, Power Cell B.E.
• on x86 → ARM binary converter with QEMU
• as part of SMI JIT compiler.

Licensed by Parallels and SMI companies


SMCC compiler based on LLVM and UTL provide 50% more performance than the best existing solution Linaro*

*compared on 8-core ARM CPU

C2FPGA translator

It's a compiler intended to provide the fastest way to map complex algorithms into FPGA/ASIC and reduce processing time and cost of IP-blocks development.


Developers-friendly environment with no general restriction on source code makes porting of big apps easier and is suitable for HPC, embedded and ASIC design.

C2FPGA Translator

Key features

High capacity

Uses virtual system on chip (VSoC) with many cores and peripheral devices for operations w/ files, IO, network, etc.


Translates applications for VSoC and merges binaries with VSoC description to get the minimal area with maximal frequency.


Provides user possibility to debug applications for VSoC on FPGA as on usual embedded processors with standard tools (GDB, Eclipse).


Hypercore customization language based on a principle «single description — multiple implementations».


Key tool for RISC-V ISA customization. In case of any specific applications of the future core, PPDL allows you to find the best set of ISA for optimization and achieve best performance per Watt or best performance per cost.

Automatically generated components:

• RTL (SystemVerilog)
• Software emulators:
— QEMU-based
— cycle accurate (as a C++ model)
• Components for binary utilities
— instruction coders for assembler and
— instruction decoders for disassembler/objdump
• Debugging interface for GDB (stub)

The Architectures PPDL is implemented for

• RRISC-V (32/64)
• NeuroMatrix
— NM6403
— NM6405
— NM6407
• Ethereum VM
— QEMU-based emulator

Up to 7 times cost reduction of core developing

Significant cost reduction of core customization

Extremely low cost of ISA modifications

Platform transfer

OS porting to new platform (linux, RTOS)& driver development


Toolchain and SDK development. Porting standard and special libraries into the specific platforms

Software optimization

Optimization of the applications and libraries

Full-circle system design

Development of complex embedded/IoT systems including both software and hardware

Solutions for graphic systems

Image processing algorithms development


If you find our services interesting, feel free to contact us

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