Industrial Expertise

Precise success roaming across the industries

The company provides optimizing solutions in a wide range of areas.


There are IP cores processing terabytes between the wires in network facilities, circuits flying through the outer space in satellites, and compilers translating millions of code lines in software toolchains all designed by Optimization Technologies.

Computer equipment (from servers to laptops)

Network equipment (including switches & routers)

Wireless communications (including satellite, cellular & other applications)

Custom Software

AI solutions

Navigation equipment

Payment systems


case 1


Embedded Navigation

Complex work involves creation of embedded navigation module.



GNSS Navigation Engine built capable to suGNSS Navigation Engine built capable to support GPS / Glonass / Galileo / SBAS / QZSS satellite systems.

The solution is supplied with specific software including GNSS device driver and special application to solve navigation tasks. As the AMBA 2.0 AHB interface is utilized, engine appears to be ready for implementation to any SoC system. And also specially created VHDL makes it suitable for any circuit building technology (FPGA, ASIC).

System on Chip with a RISC-V 64 able to maintain the system purpose.

It's represented by the radio frequency front end part as a hardware backbone with VHDL IP core and firmware for the RISC-V64 processor serving as an operational management source.

GNSS Processing Kit for the real time processing.

It uses LMS algorithms and allows all position be processed independently.

This navigation module was designed for the mobile, industrial and automotive markets.

case 2


SSD controller ASIC

ASIC for SSD management with supporting advanced data integrity algorithms was manufactured via CMOS 28 nm technology. There were 2 variations with different cores introduced, both as systems of 8 units connected via AXI Network Interconnect.



System with ARM CPU

System with RISC-V CPU

case 3


Development tools

Toolkit intended to help in software development and designed specially for the DSP processor consists of a simulator and a compilation toolchain.




Implemented simulator is based on QEMU. Its functionality allows peripheral devices modeling and supports profiling. PPDL is used to describe a new processor version. In addition, it allows to generate a target-specific C++ and speed up the simulation.


• Cross-compiler based on GCC
• Binary utilities
• Standard Libraries
• Debugger
• SDK (Eclipse)

case 4


VISC circuit for Soft Machines

VISC (Virtual Instruction Set Computing) is a processor instruction set architecture and microarchitecture developed by Soft Machines. It uses the virtual translation layer to dispatch a single thread of instructions which ends up processed at the separate virtual cores. And Optimizing Technologies ’ve taken part in creation of this ISA.



Visual processing circuit

Optimizing Technologies develops an integrated circuit due to this architecture for the video processing purpose. SoC is supplied with separate blocks to operate network peripherals, video and audio inputs/outputs, peripheral subsystems, memory, media and a block for the main CPU.

Reconfigurable core set

As this circuit implementation demands a lot of resources, in addition to a VISC media processing block was empowered with a set of differentiated CPUs. Separate GPU, VPU, APU and IPU units were deployed to operate exclusively graphics, video, audio and images respectively.

Other Unique Solutions

Within this project we made a number of unique technologies & products, including:

• Just In Time Compiler • SW Performance Analysis • SW Performance Infrastructure • Core System Architecture • Functional Simulators/Models • SMI and Guest ISA validation • SMI Toolchain • Operating Systems

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